1. Field of the Invention
The present invention relates to a semiconductor integrated circuit including programmable logical blocks.
2. Description of the Background Art
Recently electronic circuit devices have progressed rapidly, and a tendency to develop high-performance and high-function devices for short periods of time has accelerated. A need exists for integrated circuit devices which are a key to the short-term development of electronic circuit devices having high performance and function. Based on such background, a semiconductor integrated circuit has been put to practical use which is known as a field programmable gate array (hereinafter referred to as an "FPGA") capable of achieving various functions by means of programs.
FIG. 31 is an arrangement diagram of the an exemplary FPGA of prior art. A semiconductor integrated circuit 1 comprises: I/O buffers 2 around the periphery of the chip; programmable logical blocks 300 in a core region surrounded by the I/O buffers 2; wires 4 for interconnecting the I/O buffers 2 and the programmable logical blocks 300; and switch matrices 5 for controlling the connection of the wires 4.
In the programmable logical blocks 300, a plurality of limited logical functions are arranged, and one of the logical functions is selectively achieved by a control signal applied from the exterior of the semiconductor integrated circuit 1. The switch matrices 5 are controlled by a program applied from the exterior of the semiconductor integrated circuit 1, whereby desired functions of the whole semiconductor integrated circuit 1 are provided.
With the semiconductor integrated circuit 1 that is the conventional FPGA constructed as described above, its achievable functions are restricted by the logical functions arranged in the programmable logical blocks 300 and by the wires connectable with the switch matrices 5. On the other hand, the logical functions arranged in the programmable logical block 300 are previously limited when fabricated. An attempt to reduce the restrictions on the functions achievable in the semiconductor integrated circuit 1 causes a large number of redundant portions included in the programmable logical blocks 300. Such redundancy is generated also in the wires 4 and switch matrices 5, resulting in substantial reduction in the degree of integration of the semiconductor integrated circuit 1.